0451 - 2448800 - 2448899

Mr.V.jeevanantham

Mr.V.jeevanantham is a  Assistant Professor at SSMIET in the Electronics and communication Engineering discipline. He is working as a faculty in SSMIET for the past 4 year. He has 5 year 2 months of Teaching Experience.

Contact:

Email: jeevananthamrvs@gmail.com

Intercom: 0451 – 2448870

  • Doing research in Information and communication Engineering (Ph.D), Anna University, Chennai
  • M.E., (VLSI DESIGN), PSNA CET, Dindigul.
  • B.E., (Electronics and Communication Engineering), RVS CET, Dindigul.

Jeevanantham’s area of research is broadly focused on Image Processing

Publications

  • Published a paper on Non Complementary Clocked Logic Circuitfor Arithmetic Circuit Design in ADVANCES in NATURAL and APPLIED SCIENCES,march 2016.
  • Presented a paper on “Low-power design based on ODTM Technique” in the 2nd IEEE International conference held on 4th  April  2103 at Adhiparasakthi Engineering college,Melmaruvathur  is published in IEEE Xplore digital library
  • Veerammal College of Engineering and Technology for Women; from June 2013 to May 2014.

Memberships

  • Member in Indian Society for Technical Education